Power Management Techniques: Power Simulators and Dynamic Power Management

Nirmal Kaur

Abstract


Power/energy management nowadays is emerging as a significant issue in designing the modern electronic circuits to reduce electricity cost and bills, improve reliability and environment considerations. The advent demand of power-performance in parallel and distributed systems has enabled the designers to develop the energy efficient techniques that aim at minimizing the energy consumption and also satisfying the goal of little or no impact on overall performance of the system. This paper pertains to address the state of art powerperformance simulators and dynamic power management techniques to reduce the energy dissipation. The underlying survey covers the power simulators to estimate the power consumption of processor and also the dynamic power management techniques to reduce the energy consumption of computing system. 

Keywords: Power simulators, power management, dynamic voltage scaling, dynamic power management

Cite this Article Nirmal Kaur. Power Management Techniques: Power Simulators and Dynamic Power Management. Recent Trends in Parallel Computing. 2016; 3(2): 39–45p. 


Full Text:

PDF

References


Nikzad Babaii Rizvandi, Javid Taheri, Zomaya Albert Y. Some Observations on Optimal Frequency Selection in DVFSBased Energy Consumption Minimization. J Parallel Distrib Comput. Aug 2011; 71(8): 1154–1164p.

Forrest W. How to Cut Data Centre Carbon Emissions? Website, Dec 2008. [Online]. Available: http://www.computer weekly.com/Articles/2008/12/05/233748/h ow-tocut-data-centre-carbon-emissions.

Markoff J, Lohr S. Intel’s Huge Bet Turns Iffy. New York Times Technology Section. Section 3, Page 1, Column 2, Sep 29, 2002.

Koch G. Discovering Multi-Core: Extending the Benefits of Moore’s Law. Technology@Intel Magazine. Jul 2005 (http://www.intel.com/technology/magazi ne/computing/multi-core-0705.pdf).

Benini L, Micheli GD. Dynamic Power Management: Design Techniques and CAD Tools. Norwell, MA, USA: Kluwer Academic Publishers; 1998.

Venkatachalam V, Franz M. Power Reduction Techniques for Microprocessor Systems. ACM Comput Surv. 2005; 37(3): 195–237p.

Unsal Osman S, Israel Koren. SystemLevel Power-Aware Design Techniques in Real-Time Systems. Proc: IEEE. Jul 2003; 91(7).

Chandrakasan A, Broderson R. Low Power Digital CMOS Design. Kluwer Academic Publishers; 1995.

Luca Benini, Alessandro Bogliolo, Giovanni De Micheli. Survey of Design Techniques for System-level Dynamic Power Management. IEEE Trans Very Large Scale Integration (VLSI) Systems. Jun 2000; 8(3).

Jejurikar R, Pereira C, Gupta R. Leakage Aware Dynamic Voltage Scaling for RealTime Embedded Systems. Proceedings of the Design Automation Conference. 2004; 275–280p.

Borkar S. Design Challenges of Technology Scaling. IEEE Micro. 1999; 19(4): 23–29p.

Duarte D, Vijaykrishnan N, Irwin M, et al. Impact of Technology Scaling and Packaging on Dynamic Voltage Scaling Techniques. Proc. IEEE Int. ASIC/SOC Conf, Los Alamitos: IEEE Computer Society Press; 2002.

Brooks D, Tiwari V, Martonosi M, et al. A Framework for Architectural-Level Power Analysis and Optimizations. ISCA. 2000.

Burger D, Austin T. The Simple Scalar Tool Set, Version 2. Tech. Report No. 1342, Computer Sciences Dept., Univ. of Wisconsin. Jun 1997.

Ye W, Vijaykrishan N, Kandemir M, et al. The Design and Use of SimplePower: A Cycle-Accurate Energy Estimation Tool. Proceedings of the Design Automation Conference. Jun 2000.

Brooks D, Wellman J-D, Bose P, et al. Power Performance Modeling and Tradeoff Analysis for a High-End Microprocessor. In Power Aware Computing Systems Workshop at ASPLOS-IX. Nov 2000.

Gowan M, Biro L, Jackson D. Power Considerations in the Design of the Alpha 21264 microprocessor. ACM Design Automation Conference. Jun 1998; 726– 731p.

Gary S, Ippolito P, Gerosa G, et al. PowerPC 603, A Microprocessor for Portable Computers. IEEE Des Test Comput. Oct 1994; 11(4): 14–23p.

Ge R, Feng X, Cameron KW. Performance-Constrained Distributed DVS Scheduling for Scientific Applications on Power-Aware Clusters. Proc. ACM/IEEE Conf. Supercomputing. Nov 2005; 34–44p.

Sanjeev Baskiyar, Rabab Abdel-Kader. Energy Aware DAG Scheduling on Heterogeneous Systems. Cluster Comput. Dec 2010; 13: 373–383p.

Yuichiro Mori, Koichi Asakura, Toyohide Watanabe. A Task Selection Based Poweraware Scheduling Algorithm for Applying DVS. International Conference on Parallel and Distributed Computing, Applications and Technologies. 2009; 518–523p.

Young Choon Lee, Zomaya Albert Y. On Effective Slack Reclamation in Task Scheduling for Energy Reduction. Journal of Information Processing Systems (JIPS). Dec 2009; 5(4).

Hideaki Kimura, Mitsuhisa Sato, Yoshihiko Hotta, et al. Empirical Study on Reducing Energy of Parallel Programs using Slack Reclamation by DVFS in a Power-scalable High Performance Cluster. Proc of 8th International IEEE Conference on Cluster Computing (CLUSTER). 2006.

Sanjeev Baskiyar, Kiran Kumar Palli. Low Power Scheduling of DAGs to Minimize Finish Times. High Performance Computing (HPC). 2006; 353–362p.

Guyand MR, Johnson DS. Computers and Intractability: A Guide to the Theory of NPCompleteness. W.H. Freeman and Co.; 1979.

Topcuoglu H, Hariri S, Wu M. Task Scheduling Algorithms for Heterogeneous Processors. 8th Proceedings Heterogeneous Computing Workshop (HCW). 1999; 3–14p.

Topcuoglu H, Hariri S, Wu M. Performance-Effective and Low-Complexity Task Scheduling for Heterogeneous Computing. IEEE Trans Parallel Distrib Syst. 2002; 13(3): 260–274p.

Ilavarasan E, Thambidurai P, Mahilmannan R. High Performance Task Scheduling Algorithm for Heterogeneous Computing System. Lect Notes Comput Sci, Springer. 2005; 3719: 193–203p.

Ilavarasan E, Thambidurai P. Low Complexity Performance Effective Task Scheduling Algorithm for Heterogeneous Computing Environments. Journal of Computer Sciences. 2007; 3(2): 94–103p.

Gerasoulis A, Yang T. A Comparison of Clustering Heuristics for Scheduling Directed Acyclic Graphs on Multiprocessors. J Parallel Distrib Comput. 1992; 16(4): 276–291p.

Liou J, Palis MA. An Efficient Task Clustering Heuristic for Scheduling DAGs on Multiprocessors. Proc. of Workshop on Resource Management, Symposium of Parallel and Distributed Processing. Oct 1996; 152–156p. 32. Cirou B, Jeannot E. Triplet: A Clustering Scheduling Algorithm for Heterogeneous Systems. Proceedings of the International Conference on Parallel Processing Workshop (ICPPW). Sep 2001; 231–236p.

Kuan-Chou Lai, Chao-Tung Yang. A Dominant Predecessor Duplication Scheduling for Heterogeneous Systems. J Supercomput. 2008; 44(2): 126–145p.

Savina Bansal, Padam Kumar, Kuldip Singh. Dealing with Heterogeneity through Limited Duplication for Scheduling Precedence Constrained Task Graphs. J Parallel Distrib Comput. 2005; 65: 479– 491p.

Savina Bansal, Padam Kumar, Kuldip Singh. Dealing with Heterogeneity through Limited Duplication for Scheduling Precedence Constrained Task Graphs. J Parallel Distrib Comput. 2005; 65: 479–491p. 36. Bittencourt Luiz F, Rizos Sakellariou. DAG Scheduling Using a Look Ahead Variant of the Heterogeneous Earliest Finish Time Algorithm. 18th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP). 2010; 27–34p.

Yao F, Demers A, Shenker S. A Scheduling Model for Reduced CPU Energy. Proceedings of the 36th Annual Symposium on Foundations of Computer Science, FOCS’95. 1995; 374–381p.

Ali Manzak, Chaitali Chakrabarti. Variable Voltage Task Scheduling Algorithms for Minimizing Energy. Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED’01, ACM, New York. 2001; 279–282p.

Weiser M, Welch B, Demers A, et al. Scheduling for Reduced CPU Energy. Proc. Symp. Operating Systems Design & Implementation, Usenix Association. Nov 1994.

Govil K, Chan E, Wasserman H. Comparing Algorithms for Dynamic Speed-Setting of a Low-Power CPU. Proc. MOBICOM. 1995; 13–25p. 41. Ziliang Zong, Adam Manzanares, Brian Stinar, et al. Energy-Aware Duplication Strategies for Scheduling PrecedenceConstrained Parallel Tasks on Clusters. Proc of the 8th IEEE International Conference on Cluster Computing. Sep 2006.

Gruian F, Kuchcinski K. LEneS: Task Scheduling for Low-Energy Systems Using Variable Supply Voltage Processors. Proc. Asia and South Pacific Design Automation Conference. 2001; 449–455p.

Yu Li, Yi Liu, Depei Qian. A Heuristic Energy-aware Scheduling Algorithm for Heterogeneous Clusters. Proc of 15th International Conference on Parallel and Distributed Systems (ICPADS). 2009; 407–413p.

Pepijn de Langen, Ben Juurlink. Trade-Off between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors. Springer. 2007; 75–85p.

Lizhe Wang, Gregor von Laszewski. Towards Energy Aware Scheduling for Precedence Constrained Parallel Tasks in a Cluster with DVFS. IEEE/ACM International Conference on Cluster, Cloud and Grid Computing. 2010; 368– 377p.


Refbacks

  • There are currently no refbacks.


This site has been shifted to https://stmcomputers.stmjournals.com/