Low power high performance CMOS Schmitt Trigger using nanoscale CMOS Technology

Authors

  • Vineet Samadhiya

DOI:

https://doi.org/10.37591/jomccmn.v5i1.1578

Abstract

This paper presents different low voltage adjustable CMOS Schmitt trigger at 90nm technology. This paper proposes the transient response and noise response analysis of  CMOS Schmitt trigger circuit which will give noisy input signals with less noise response and also applicable for low power. It enumerates reduction of power consumption, which is in major demand in the field of VLSI. The CMOS device is used to achieve better power consumption, speed, and hysteresis. Schmitt triggers are the regenerative comparators which are widely used in circuits. This CMOS Schmitt architecture which further can be applicable for frequency synthesis, data recovery, tracking input signals such as in tracking generators(ex: car’s cruise control),clock generation etc. After simulation i.e., after performing analysis of Hysteresis, noise response it provides less noise and low power at reduces supply voltage and improves the gain of the circuit, Transconductance provide positive property of Schmitt trigger, high Transconductance is improve the circuit performance. The designed CMOS Schmitt trigger and simulations are carried out by Cadence.

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Published

2018-07-06

Issue

Vol. 5 No. 1 (2018)

Section

Review Articles

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